Regular Expression for VHDL compiler.

[helios]

The output from the VHDL complier VSIM returns this type of error:

** Error: C:\data\Projects\Havasu\ProgDev\CPLD_DLC12\top.vhd(37): near "-": syntax error

The correct tool regex settings should be:

Expression to match output:
^\*\* \(Error\|Warning\): \(.+\)(\([0-9]+\)

File:
Register 2

Line:
Register 3

This tip contributed by Paul McGary.