Clip Library, column wrapping display

[DSPinFPGA]

It would help efficay if the view of clip libraries would wrap on to as many columns as it takes to display the full library.

To put in perspective, my VHDL_RTL.tcl spans about 150 lines, VHDL_TEST.tcl about 280, ADA.tcl about 350.

The monitor is good for 106 lines, so textpad becomes rather cumbersome!